In order to develop a next generation vehicle realizing a safer, more comfortable, cheaper, and more energy saving vehicle, advancement and integration of (i) a real time control system such as engine control and (ii) an information system such as a presentation of information required for a human recognition, a surrounding vehicle recognition, and traveling, and an output of music, an video image, or the like become important.
An improvement of a processor is important in order to implement the advancement and the integration of the control system and the information system. For example, to improve the engine control system, which is important for a development of a safer and more comfortable vehicle having a good fuel efficiency, an increase of calculation loads may be unavoidable due to an advancement of a control algorithm, an implementation of a new control function, or the like. Acceleration of the processor implementing the real time control may be required.
The applicants of the present invention have found the following. However, an improvement of an operating frequency of a processor like the convention manner may be difficult since power consumption may increase in proportion to cube of the frequency. Therefore, a multicore processor may become used at a quick pace. The multicore processor has a feature that multiple processor cores of low operating frequency are integrated on one chip. The multiple processor cores are parallelly operated at a low frequency in a low voltage to reduce the power consumption. The acceleration of processing and low voltage operation may be both realized.
So that the multicore processor performs a processing faster than a single core processor, a processing of the sequential program for the single core processor is required to divide, and each processing is assigned to each processor core in a form where a communication between each of the processor cores becomes minimum. Conventionally, a person performs a parallelizing of the sequential program. However, this work may be very difficult and require a long period of time, so that many difficulties such as an increase in development costs and a reliability of a parallelized program, or the like, may occur.
In non-patent literature 1, a technology for raising a throughput is disclosed in which functions are distributed to each processor core in an onboard apparatus having a multicore processor.
However, in order to fully utilize a processing capability of each processor core, it may be necessary to extract a processing, which is parallelly executable, and to assign to different processor cores. Therefore, when a function is simply distributed to each processor core, only the throughput is improved, and a latency may not be reduced. A processing may not be performed at a high speed.
Non-patent literature 1: K. Seo, J. Yoon, J. Kim, T. Chung, K. Yi, and N. Chang, “Coordinated implementation and processing of a unified chassis control algorithm with multi-central-processing unit”, JAUTO1346 IMechE, 2009, Vol. 224 Part D.